Senior Verification Engineer

We are seeking a Senior Verification Engineer to join a market-leading Semiconductor IP company developing on-chip network technology.

This role can be based in California or Austin, TX.  

Our client, still relatively young, is experiencing huge demand for their technology. They have achieved massive revenue growth year-over-year, and are now hiring for a Senior Verification Engineer with cache coherency experience to own verification activities on high performance, low power designs for a major new project. 

The role will involve working on some of the world's most sophisticated SoC designs within areas such as autonomous driving and machine learning. 

The Senior Verification Engineer will be responsible for advanced UVM based testbench development and owning RTL verification test/coverage at system level. The Design Verification Engineer will be a UVM expert, capable of refining the verification process and methodology across the company. 

Required: 

• A BS / MS degree in Computer Science or related field
• Several years’ experience within digital SoC verification
• Expert skills in SystemVerilog and UVM
• Experience with ARM AMBA protocols
• A background in cache coherency

Get in touch today for details - contact Caroline Pye