Senior Analog Mixed Signal IC Design Engineer


Premium Job From IC Resources

Recruiter

IC Resources

Listed on

21st March

Location

Zürich

Type

Permanent

Start Date

2024-03-21

This job has now expired please search on the home page to find live IT Jobs.

I am recruiting for a prominent leader in advanced audio solutions who is seeking a Senior Analog Mixed Signal IC Designer to join their team. The role revolves around developing ASICs for MEMS microphones supplied to leading smartphone manufacturers globally.

As a Senior Analog/Mixed-Signal Design Engineer, you'll lead ASIC design from concept to mass production, assuming technical responsibility for ASICs throughout the process.

Responsibilities will include but are not limited to:

  • Develop high-performance analogue/mixed-signal ASICs from concept to mass production.
  • Design and verify complex ASIC building blocks for testing and manufacturing.
  • Collaborate with marketers, system engineers, and the design team to develop ASIC architectures.
  • Lead ASIC development projects, working closely with Project Management, Product/Test Engineering, etc.
  • Present concepts and technical status to stakeholders, including customers.
  • Perform post-layout simulations to verify performance at block and system levels.
  • Create and patent new IPs.
  • Work with layout engineers to minimise parasitic effects.
  • Lead initial evaluation of ASICs in the lab to validate performance.
  • Conduct complex root cause analysis of design and process-related issues.
  • Mentor less experienced engineers and contribute significantly to design reviews.
Qualifications:
  • Degree in electronic engineering or a related field.
  • 5+ years of experience developing high-performance analogue or mixed-signal integrated circuits in consumer or industrial R&D.
  • Expertise in designing low-noise, low-power analog circuits.
  • Experience with sigma-delta ADCs is advantageous.
  • Strong intuitive and analytical understanding of transistor-level design.
  • Proficiency in EDA tools such as Cadence.
  • Extensive experience in silicon evaluation and debugging.
  • Demonstrated technical leadership.
  • Structured and methodical approach.
  • Strong team player.
  • Excellent spoken and written communication skills in English.
For more information, please contact Parm Shergill.

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