Junior Verification Engineer

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Verification Engineer

Cambridge

1 day per week in office

I am seeking a Verification Engineer to join a company based in Cambridge where you will be producing high-quality, security-focused, open, and flexible IP. Their expertise includes the LLVM Compiler, novel hardware security extensions and RISC-V tools, hardware and processor design.

This is a great opportunity for a Verification Engineer who perhaps is looking for their 2nd role in industry or a recent PhD or Masters grad with an excellent academic background who wants to be involved across the full verification cycle from initial planning to final tapeout and be part of a business where you will work collaboratively with not only company employees but external partners and Engineers across the globe.

The Verification Engineer will have the opportunity to apply industrial-strength design verification to high quality open-source code bases. You will be working on the verification of the range of open-source designs they are producing. This includes a RISC-V core, a separate special purpose CPU for cryptographic operations, an AES accelerator and a variety of peripherals (such as USB, I2C and SPI).

Part of the role will be to Design, implement and debug block-level and system-level tests and testbenches using SystemVerilog and UVM.

Being in a small team, you will get the opportunity to be involved in lots of different elements of both Design and Verification work.

Skills

• 2 years+ prior industry experience of design verification including significant SystemVerilog and UVM usage
• Comfortable working with engineers across multiple organisations in multidisciplinary teams
• Undergraduate degree in a technical discipline or equivalent experience.

On offer will be a range of benefits including a competitive salary within the range of £44,000 - £61,000, Hybrid working, a leading pension contribution and sabbaticals for length of service.

For more information and a confidential discussion, please contact Rachel Mason.