Digital Verification Engineer
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Are you a Digital ASIC Verification engineering looking for a new project?
I am currently working with a client in Dublin who are looking for a Verification contractor that can assist them on a project for the next 3 months. You would be carrying out functional verification for an ASIC chip and would be using a SystemVerilog testbench.
The the testbench will be within an existing UVM environment so although you would need a working knowledge of UVM you would not need to be an expert.
Key Points:
* Digital IC Verification
* SystemVerilog
* UVM
* Functional coverage
* EUR60-65per hour
Applicants must have eligibility to work in the EU prior to submitting there profile for this position.
If you would like to apply for this position please get in touch at [email protected]
