A new ASIC/FPGA Digital Design Opportunity has arisen in Aix en Provence for a semi-conductor company who are specializing in high-speed interconnect supporting multi-gigabit rates.
You will join their Research and Development team and your mission will be to define architecture and implement RTL Design for specific requirements. You will be responsible for making sure the designs meet quality and scheduled goals. It is a great opportunity to work the whole life cycle, from design, implementation, validation to the verification stage.
The successful candidate will have knowledge and experience in FPGA or ASIC design flows using either VHDL or Verilog coding. It would be great if you also had some software scripting experience in either Python or Cshell. You will need to have some knowledge of high-speed interface protocols and high-performance computing systems.
This role as an ASIC/FPGA Digital Design Engineer offers a competitive salary for the local area.
If this position is of interest to you and you want to hear further details about this opportunity, then please contract Andrew Click here to contact this recruiter
Only European engineers can apply, as our client will not offer visa sponsorship.