Design Verification Engineer

Design Verification Engineer - Berkshire

This is an opportunity for a Design Verification Engineer to join an innovative environment and an organisation making changes in the technology sector.

The Design Verification Engineer will join a team developing high-performance, low-power signal processing solutions in audio, voice, and haptics, delivering innovative end-user experiences and solving difficult challenges for new generations of mobile and consumer devices.

You will join the team in Berkshire and will take ownership of all aspects of digital verification for complete IC developments, work on complex verification subsystems and will contribute towards improvements in methodology.

Responsibilities

• Definition of IC verification plan linking product requirements through to detailed testcases
• Leading teams of verification engineers to deliver thoroughly verified ICs
• Create reliable and reusable testbench for complex subsystems and ICs
• Participate in verification Specialist Groups and contribute to the digital verification methodology discussions
• Hands-on project design/verification involvement

• Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis
• SystemVerilog
• Testbench design with verification frameworks like UVM/OVM, e, VMM
• Debugging skills - RTL - Testbench, OOP - Gate level (including SDF)
• Formal verification and verification qualification techniques
• Scripting experience with Ruby, sh/csh, TCL, Make, Perl - advantage

On offer is a competitive base salary, bonus scheme and stock options.

For more information please contact Rachel Mason.