Digital Verification Engineer
Recruiter
IC Resources
Listed on
12th October 2022
Location
Vienna
Salary/Rate
£65000 - £70000
Type
Permanent
Start Date
2022-10-11
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A leading edge Austrian company with international presence is looking to hire a Digital Verification Engineer for their international team in their office in Vienna! Applications form international location are welcome and visa will be sponsored. This role is based in Vienna and remote from abroad is not an option. Your responsibilities as digital Verification Engineer will be:Create and maintain verification plans for complex ASICs/FPGAs Develop constrained random verification environment using UVM methodology for block as well as system level verification Code testcases and setup regression to attain the verification goals Functional coverage and code coverage analysis Participate in technical reviews of design specification and verification code Work in close collaboration with designers and ensure timely closure of verification tasksYou have the following skills and qualifications:
University degree in Electrical Engineering / Computer Engineering / Embedded Systems or other comparable education 3+ years of industry experience in verification of ASIC/FPGA designs Strong analytical and debugging skills Good command of English Knowledge of one of the HDL languages - System Verilog, Verilog, VHDL Experience in developing UVM/OVM/Specman/System C test benches is beneficial Experience with assertions (OVL/SVA) is preferred Good knowledge of scripting languages like Shell/TCL/Python/Perl is a plusFor more information about the company and to apply, please contact Ane @ IC Resources!