Principal Verification Engineer


Premium Job From IC Resources

Recruiter

IC Resources

Listed on

6th July 2022

Location

Cambridge

Salary/Rate

£70000 - £110000

Type

Permanent

Start Date

2022-07-05

This job has now expired please search on the home page to find live IT Jobs.

Principal Verification Engineer - NEW CAMBRIDGE DESIGN CENTRE! I am seeking a Principal Verification Engineer to join my clients brand new team to be based in Cambridge. With a site already in the UK and 2 in Germany this is due to pure growth! Initially all hires will work from home whilst an office space is secured, in which a hybrid model will then be adopted. If you enjoy working in a creative fast-growing entrepreneurial environment and have an interest in working for a company whose modalities include LiDAR, radar, ultrasound and vision for ADAS than this could be a great role for you! Reporting to the Digital Verification Manager, you will execute and drive all aspects of pre-silicon verification with a goal of ensuring the highest quality first silicon. This is an experienced-level position.

Job Responsibilities:
Develop verification and coverage plan based on the design of micro-architectureArchitect verification environments for digital IPs, sub-system and chip-levelExecute verification plan, including design bring-up, DV environment bring-upDrive verification methodology discussions, mentor and lead a team of verification engineersThe Design team realise nobody is perfect and it is not essential to have all the skills below - but note, some must be present!
10+ years of experience in digital design verificationTrack record as a contributor who has executed multiple successful tape-out cyclesExpert in object-oriented programming and constrained random verification conceptsDeep understanding of digital design concepts and System Verilog HDLAdvanced level user of verification methodologies such as UVM or eRM (Specman e)Experience developing verification environments and re-usable components from scratchProficient in implementing checkers using System Verilog AssertionsExperience in using Cadence or Mentor Questa tool suite for verificationUnderstanding of micro-processor bus fabric protocols such as AHB, APB, AXI is preferredKnowledge of USB.Experience writing scripts in languages such as Perl, Ruby, Python, or TCLFamiliarity with bug tracking tools such as JIRAFor more information and a confidential discussion, please contact Rachel Mason at IC Resources - 0118 9881107

You are currently using an outdated browser.

Please consider using a modern browser such as one listed below: