DFT Engineer


Premium Job From IC Resources

Recruiter

IC Resources

Listed on

8th July 2021

Location

Wokingham

Salary/Rate

£55000 - £75000

Type

Permanent

Start Date

2021-04-05

This job has now expired please search on the home page to find live IT Jobs.

Superb flexible working DFT opportunity for an engineer to join my clients growing ASIC Implementation team.
Flexible working is considered for UK nationals - for EU and non-EU nationals you MUST relocate to the UK. The ideal candidate will have a strong academic record and 5-10 years’ experience in Design for Test (DFT) within digital and mixed-signal ASIC/SoC development. You will be familiar with the challenges of architect, specifying, and implementing DFT within complex ASIC/SoC designs, most of which include power management, memories, and Analog IP elements such as PLLs, ADC/DAC, and SerDes PHY’s. You will also have experience with automatic and manual test-pattern generation flows, fault coverage analysis, and MBIST implementation. The candidate should have customer and supplier-facing experience and excellent communication skills. Key Tasks / Responsibilities
Take full-flow ownership of all DFT, MBIST, and test-pattern generation for complex digital and mixed-signal ASIC designs on an as-needed basis to meet customer project requirements.Setup, run, and maintain EDA tool flows relating to DFT, MBIST, and test pattern generation.Keep up to date with all aspects of ASIC Test methodology and best-practice to ensure that company expertise and services are always current and appropriate for each customer project.Key skills / Background
1st or 2.1 Electronics, Physics or relevant subject from a Tier 1 group University5-10 years’ experience in industry with a strong track record in DFT gained across several successful ASIC projects, and ideally at process nodes down to and including 16FF.Some specific skills in DFT implementation
Knowledge of the full Synopsys or Mentor Tessent DFT tool kit(s) would be advantageous.Experience of RTL and gate-level simulation as applied to DFT verification.VHDL/Verilog coding skillsImplementation using tool-based and hand-crafted methods.Integration of IP including CPU’s, Analog Macros, and IO PHYsMBIST and memory repair integrationThis role will offer a competitive salary, excellent working environment, matched contribution pension scheme, subsidised private healthcare scheme, life assurance and share options scheme. For more information and a confidential discussion - contact Rachel Mason at IC Resources

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