Digital Verification Engineer! Excellent opportunity to join a global semiconductor company in the heart of Edinburgh.

You will be part of a new verification team which collaborates on the verification of gate-driver ICs and SoCs based on innovative new core architectures.

This is a great time to join my clients expanding European Design Centre in Edinburgh, Scotland. Critical to their new product development plans, the Centre designs advanced power control IC's for a broad range of product applications and are recognised world-wide as providing state-of-the-art automotive power integrated circuits.

Responsibilities:

• Review and analysis of IP and system-level design specifications to drive identification of functional coverage conditions.
• Propose and implement appropriate verification solutions to meet functional coverage requirements.
• Verilog/SystemVerilog/UVM testbench development.
• Code and functional coverage analysis and debug of RTL and gate-level simulations.
• Maintenance and continuous improvement of verification methodology, automation and regression control.

• Knowledge of the embedded SoC design and verification life cycle with an emphasis on design verification tasks such as: test plan development, test bench creation, test coverage analysis and debug of unexpected design behaviour.
• Knowledge of CPU, Memory or I/O Subsystem microarchitectures (caches, virtual memory, DMA, memory access optimisation's).
• Experience identifying functional coverage conditions based on microarchitecture specifications.
• Experience of SystemVerilog digital & mixed-signal verification.

Contact Name: Rachel Mason
Reference: TJ/801/V-170316
Job ID: 2910763