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ASIC Design Engineer

Premium Job From IC Resources
Recruiter: IC Resources
Listed on: 11th February
Location: Bristol
Salary/Rate: £50000 - £80000
Type: Permanent
Start Date: 2020-11-10

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This is a superb opportunity to join a 2-year-old start-up who are in partnership with many of Bristol’s established semiconductor companies! My client is currently developing chips and associated software and system solutions for 5G infrastructure. This is a company which moves with the times and due to current world pandemics is offering flexible working as well as excellent salaries and a competitive benefits package. This is an ideal time to join a company where personal growth is encouraged and a role where you could be truly instrumental in business success. The role You will be involved in a small team developing semiconductor devices, from architecture down through RTL and working closely with back-end designers, both inside and outside the company. I have vacancies for people with overall experience ranging from 2-3 years through to several decades. Requirements The essential requirements are: Experience of SoC design.Demonstrate an ability to solve complex SoC design problems.Demonstrate the ability to work within a team with minimum supervision.In addition, candidates must have hands-on experience of some of the following. We aim to cover all these areas within the team, but not within one person. So if you tick some of these I would like to hear from you!Architectural specification of complex digital chips.Working with external IP and IP suppliers.Working with external design houses.Verification.Buses (AXi3, 4, APB, etc) and Networks on Chip.Integration of complex DSP and scalar processors.Memory hierarchies.RTL design (we will primarily use Verilog).Top-level chip integration, including high-speed SerDes, pad-ring design.Test methodologies (using JTAG, scan, memory BIST).DDR interfaces, PCIe, Ethernet and other SerDes-based communications.Knowledge of wireless systems (eg: 3GPP, WiFi).EDA tool flows and scripting (eg: in Python).C and/or C++ and/or System C.Synthesis.Place and route.Timing analysis and timing closure.Chip bring-up, silicon and system debug.  For a confidential discussion and more information please contact Rachel Mason at IC Resources.