Sensor Chip Architect - ToF Sensors


Premium Job From IC Resources

Recruiter

IC Resources

Listed on

3rd August 2020

Location

Brussels

Salary/Rate

£60000 - £65000

Type

Permanent

Start Date

2020-06-01

This job has now expired please search on the home page to find live IT Jobs.

An ideally Japanese speaking Analog IC Designer is required to work on next generation Time of Flight sensor designs and architectures in an advanced technology team which is enabling the next generation of Time of Flight imaging.  In this role you will work R&D on TOF sensors with a focus on the top level/architectural design of TOF sensors. This will include top level design of the sensor with considerations to physical requirements (chip size, block/pad locations), electrical requirement (power/clock distribution, ESD, noise), and optical requirements. You will be involved in the full design cycle of Analog Mixed Signal IC’s from conception to design to validation in silicon to volume production and work closely with other design team members (including analog, logic, pixel, verification, device, back-end etc) to understand their needs and optimize the sensor architecture. You will be working with design teams, hardware and software engineers to successfully complete challenging IC and sensor system design projects.  As the successful Sensor Architect you are industry degree qualified and have at least 3-5 years of experience with the design of complex analog mixed signal blocks such as ADC, DAC, PLL, bias generator, gain amplifiers, and comparators and the full design flow in a Cadence environment from schematics, area estimation, full layout, parasitic extraction, ECO implementation. You should also have experience with power analysis, clock distribution, IR drop measurement, power planning, I/O-ring/ESD considerations as well as the top level layout of full chips, LVS / DRC at block and full chip level using tools like Assura and Calibre.  Desirable skills are: Experience in physical verification flow and tools
Parasitic extraction Cadence QRC, Synopsys StarRC
Simulation analysis of analog blocks including a deep understanding of basic (R/L/C/Tr) element fabrication process, simulation models and model accuracy.
Knowledge of image sensor functions a plus.To apply for this position please click APPLY NOW to be contacted by a member of our team!

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