ASIC Design Engineer - Clock Design
£50000 - £80000
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Superb opportunity! Global Semiconductor giant! ASIC Design!
This is a superb opportunity for an ASIC design engineer to join my client; undoubtedly the industry leader in 3G, 4G and 5G communication technology, the largest fabless semiconductor company in the world!
My clients global SoC Team is actively seeking digital ASIC design engineers for several Clock Control Design & Automation positions at their European HQ based in the beautiful country of Ireland.
You will be part of the design team that will drive and execute on all phases of the ASIC design flow for Snapdragon products at the core and chip-level using leading-edge CMOS process nodes with 10nm devices in production and currently developing 7nm CMOS designs.
As a Design Engineer, you will play a vital role in delivering complex clocking solutions targeting the Mobile and IOT markets. You will work with best-in-class methodologies, tools and technology to design innovative SOC products at the block/IP-level and at system-level.
RTL digital design experience using Verilog/System Verilog or VHDL.Proficiency in any automation/scripting languages such as Python/Perl etc.Understanding of digital logic design.Recent experience or education in low power design, high speed digital design and methodology.Experience with Clock Domain Crossing (CDC) and RTL Lint tools (Desired)
With an excellent benefits package and a desirable salary, this is the perfect role for anyone looking for the next step in their career.
Note: My client are able to provide sponsorship for exceptional candidates located inside or just outside of Europe.
Contact Rachel Mason to apply!