AMS Verification Engineer - Switzerland

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A successful and growing multinational company currently seek an Analog/Mixed Signal Verification Engineer for their site in the scenic French speaking part of Switzerland.Working with specialists in their field, you will be working alongside Analog IC Design engineers working on the Verification of Mixed Signal blocks for high speed SerDes applications.Skills required include:SystemVerilog, Verilog RTL, Verilog-AMS and Verilog-AExperience in developing behavioral models of mixed signal SystemsFamiliarity with the Cadence Analog Design Environment (ADE-L/ADEXL/ Maestro), ideally using the AMS simulatorAnalog circuit design, transient, DC, AC simulation and Monte Carlo analysis basicsCadence Virtuoso, Spectre circuit simulator, Incisive and AMS simulators experienceBasic understanding of Analog circuits e.g voltage references, current references, LDOs, PLLs, Bandgap, OPAMPs, etcGood problem solving skills are required along with the ability to leverage existing knowledge effectively and learn new techniques as needed. Excellent communication skills in English are required as well as the ability to effectively work in cross disciplinary teams.Competitive salary on offer. Visa sponsorship is not possible for this specific location.Contact Leon at IC Resources today to apply on [email protected]