|Listed on:||3rd August|
|Salary/Rate:||£30,000 - £90,000|
|Contact Name:||Andrew Emberson|
If you are an ASIC/FPGA Digital Design Engineer that is looking to work with a Global Semi-Conductor client located in Manchester than please read on!
Our client is working on the next generation of compute subsystems. You will be responsible for driving the specification and development of next generation of compute systems, using state of the art technologies and tools.
Our client is expanding their Digital Design team and they are looking for multiple engineers who have worked on ASIC and FPGA Design's using RTL.
To be considered for this role you must have;
· Experience in ASIC or FPGA Designs
· Knowledge and experience RTL coding (Verilog/ VHDL)
· Track record in design to high-speed complex chips and experience in advanced process nodes is an advantage.
· Knowledge of TcL Perl, Python)
You'll learn a lot, and will enjoy working within a small, experienced team which has a very positive, collaborative environment, good energy, and excellent prospects for long-term career growth.
For details call Andrew Click here to contact this recruiter Resources