Staff Layout Engineer
pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor’s 30-year legacy of technology advancements and strong IP portfolio but with a new mission—to enhance Murata’s world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi’s product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi’s team explores new ways to make electronics for the connected world smaller, thinner, faster and better.
The Staff Layout Engineer is responsible for the physical layout of pSemi’s IC product lines. This position will work on a variety of product lines and is a key contributor to our growing product portfolio. This position will interface with domestic design engineering teams and may interact with international design engineering teams, in multiple design centers, across multiple time zones.
Roles & Responsibilities
This position has responsibility for:
Layout of Block and Top level layout cells
Floor planning and die size estimation
Estimating and scheduling layout tasks
Physical Verification (DRC/LVS/ANT)
Data prep (Slotting and Dummy Fill)
Drive CAD and Layout methodology improvements
Mentor junior Layout Engineers and provide input to peers
Layout of DC to DC converters, Buck and Boost Power Switches, LDO regulators
Layout of Power Packages including WLCSP, PSIP, QFN
In order to perform the job successfully, an individual should demonstrate the following competencies:
Critical Thinking: Skilled at finding logical flaws in arguments and plans; identifies problems and solutions that others might miss; provides detailed insight and constructive criticism into problems and complex situations
Working with Ambiguity: Achieves forward progress in the face of poorly defined situations and/or unclear goals; able to work effectively with limited or partial information
Serving Customers: Builds strong relationships with customers; stays aware of customer needs, concerns and satisfaction; responds promptly to customer questions and requests; effectively manages customer expectations
Adapting to Change: Maintains a positive attitude in the face of change; appropriately adjusts behavior and activities to changing conditions
Delivering High Quality Work: Critically reviews work processes to ensure quality; addresses problems that could impact quality; makes sure project deliverables and services meet all requirements and expectations; does not make the same mistakes twice.
Works professionally in communication and presentation with peers.
Minimum Qualifications (Experience and Skills)
10 years of IC Layout experience
Knowledge of IC fabrication process and how this impacts physical implementations
Experience with top-down physical design techniques
Experience with Linux/UNIX OS
Experience in critical matching of sensitive circuits such as bias blocks, bandgaps, op-amps, and comparators
Proficiencies in the following tools: Cadence Layout Suite tools (V6.1 or later), Calibre, Assura, PVS verification tools, Parasitic Extraction, Routing efficiency tools such as wire editor and auto router, VXL Digital Place and Route Tools.
Digital (RTL, Synthesis) Implementation (P&R) is a plus.
Understands Impacts of High Power circuits on layout techniques
Can make all electronics calculations including Ohm’s Law, resistance, capacitance, and inductance
Experience is SOI technologies
Excellent written and verbal communication (English proficiency)
Good problem solving skills
Self-motivated and team oriented with strong sense of urgency to meet product schedules
Associate’s Degree in related field; Bachelor’s Degree preferred
This job operates in a professional office environment. This role routinely uses standard office equipment. Possibility of light travel (locally or long distance) to collaborate face to face with design peers.
Physical and Demands
Physical demands although light in nature are required for the office environment. These abilities include sitting for long hours, good vision to interpret the CAD design drawings, sporadically work long shifts greater than 10 hours.
The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds.
pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver’s license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including "protected veterans” under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics.
Note: The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents: http://patents.psemi.com