FPGA Xilinx Developer/ Senior FPGA Engineer/ FPGA Developer/ FPGA Xilinx Vivado Developer

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FPGA Xilinx Developer/ Senior FPGA Engineer/ FPGA Developer/ FPGA Xilinx Vivado DeveloperA Surrey based client of mine currently has urgent requirements for two FPGA developers to join them on-site on a contractual basis with up to 24 months of extensions.The aim is to accelerate the design and development of VHDL code for elements of the next generation product line. You will be expected to develop designs from initial ideas and concepts through to full production with supporting test-benches and documentation.The two requirements have been broken down into two Job descriptions highlighted below, either the Ethernet or DSP experience is fine - you do not need both.The Rate is £35 to £45 per hour with more being available for a candidate with the ideal experience. JOB DESCRIPTION 1: The role requires prior experience of FPGA based 10GB Ethernet (or similar) streaming packet data processing and routing.The role requires the use of Mentor Modelsim PE and Xilinx Vivado tools and requires knowledge of the Xilinx Ultrascale+ FPGA device family.Experience of FPGA logic design within a commercial environment.Prior knowledge of Xilinx 10GB Ethernet IP core.Experience of VHDL coding language.Experience with Modelsim and Vivado tools for simulation and timing closure.Experience of developing and implementation of high speed designs within FPGAs.Good communication skills and interpersonal skills.Experience in developing and debugging combined hardware and software products within a multi-disciplinary team environment.EXPERIENCE/SKILLS REQUIRED: Four or more years' experience of FPGA logic design within a commercial environment.Prior knowledge of Xilinx 10GB Ethernet IP core.Experience of VHDL coding language.Experience with Modelsim and Vivado tools for simulation and timing closure.Experience of developing and implementation of high speed designs within FPGAs.Experience in developing and debugging combined hardware and software products within a multi-disciplinary team environment.JOB DESCRIPTION 2: The role requires prior experience of FPGA based DSP development or mathematical algorithm processing.The role requires the use of Mentor Modelsim PE and Xilinx Vivado tools and requires knowledge of the Xilinx Ultrascale+ FPGA device family.The role is expected to work closely with other members of the team (same and other disciplines) to achieve the required product development goals.Four or more years' experience of FPGA logic design within a commercial environment.Experience of FPGA based mathematical data processing or DSP filter development using VHDL.Experience of VHDL coding language.Experience with Modelsim and Vivado tools for simulation and timing closure.Experience of developing and implementation of high speed designs within FPGAs.Good communication skills and interpersonal skills.Experience in developing and debugging combined hardware and software products within a multi-disciplinary team environment.DUTIES & RESPONSIBILITIES: The development of wireless communications equipment or any other product opportunities identified.FPGA code development to support product functions.Proof of functionality via functional testbenches and synthesis tool timing closureIntegration of designs with software engineering and on hardware productsDocumentation and support of designs within a project environment.EXPERIENCE/SKILLS DESIRABLEExperience with product testing and certification / qualification to industry standardsExperience of developing module requirements from industry standards or specifications.Knowledge and experience of baseband signal processing (UMTS, WiMAX, LTE) or equivalent.The interview process is two stage, a telephone call followed by a face to face. CV's are being considered from the 16/04/2018, interviews are happening from the 17/04/2018 and this is for an ASAP start.N.B This is a contract role and can not offer sponsorship.