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Physical Design Engineer - Back End / Nice

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Location:France
Tags: design engineer | ic | digital | asic |
Type:Permanent
Europe's leading design consultancy requires several physical design engineers with experience in: digital, physical, IC, design, back end, timing analysis, STA, place and route, P&R, PNR, flooplanning, 90nm, SoC, synthesis, semiconductor.

Europe's leading design consultancy requires several physical design engineers with particular experience in timing closure.

We are looking for motivated, flexible individuals who are able to make frequent trips to customer sites throughout Europe. There is also the option for some home working when travel is not required.

In this role you will contribute to defining 90nm physical implementation methodology for high speed processor and SoC design. Candidates must be degree qualified in a relevant subject, with strong experience in chip level timing analysis. Previous experience of chip level timing analysis work essential, familiarity with crosstalk timing and signal integrity issues all desirable. Knowledge of 90nm design flows and methods would be an advantage.

<i>'IC Resources - your first contact for ASIC / FPGA positions throughout the UK, Europe and worldwide. Deep market knowledge and extensive contacts. Personal representation, strong ethics.' www.ic-resources.co.uk </ i>

http://www.technojobs.co.uk/job.phtml/150482

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