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Physical Design Engineer - Magma / France
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| Location: | France |
|---|---|
| Tags: | magma | design engineer | ic | digital | tcl | perl | asic | multimedia | cadence | |
| Type: | Permanent |
Several vacancies exist for Digital Physical Design Engineers in the south of France. Relevant skills include: digital, IC, SoC, physical, back end, design, ASIC, RTL, GDS2, GDSII, synthesis, floorplanning, static timing analysis, STA, clocktree synthesis, place & route, P&R, PNR, layout, netlist, physical verification, DFT, design for test, timing closure, tape out, EDA, Magma, Synopsys, Cadence, scripting, perl, tcl, tk, semiconductor, job.
Global design services company currently enjoying a prosperous season of growth is seeking several Physical Design engineers to be based out of Sophia Antipolis. Our client has a number of successful ongoing projects in a variety of divisions including medical, digital multimedia and mobile telephony, all of which require expertise to complete the physical design (RTL to GDSII).
We are looking for a number of degree-qualified engineers with relevant experience in:
Back end design / RTL to layout for complex SoCs, Floorplanning, Powerplanning, Place & Route, Clocktree Synthesis, Timing Verification, Signal integrity, layout optimisations, DFT and physical verification. Experience with EDA tools (Magma ideally) as well as scripting languages (Perl, tcl / tk) is also required.
Applications from candidates with existing eligibility to work in France only please.
<i>'IC Resources - your first contact for ASIC / FPGA positions throughout the UK, Europe and worldwide. Deep market knowledge and extensive contacts. Personal representation, strong ethics.' www.ic-resources.co.uk </ i>
Global design services company currently enjoying a prosperous season of growth is seeking several Physical Design engineers to be based out of Sophia Antipolis. Our client has a number of successful ongoing projects in a variety of divisions including medical, digital multimedia and mobile telephony, all of which require expertise to complete the physical design (RTL to GDSII).
We are looking for a number of degree-qualified engineers with relevant experience in:
Back end design / RTL to layout for complex SoCs, Floorplanning, Powerplanning, Place & Route, Clocktree Synthesis, Timing Verification, Signal integrity, layout optimisations, DFT and physical verification. Experience with EDA tools (Magma ideally) as well as scripting languages (Perl, tcl / tk) is also required.
Applications from candidates with existing eligibility to work in France only please.
<i>'IC Resources - your first contact for ASIC / FPGA positions throughout the UK, Europe and worldwide. Deep market knowledge and extensive contacts. Personal representation, strong ethics.' www.ic-resources.co.uk </ i>
http://www.technojobs.co.uk/job.phtml/149411
